The natural pattern-creating process that forms seashells, snowflakes, and enamel on teeth has been harnessed by IBM to form trillions of holes to create insulating vacuums around the miles of nano-scale wires packed next to each other inside each computer chip.
Using a "self assembly" nanotechnology IBM has created a vacuum between the miles of wire inside a Power Architecture microprocessor reducing unwanted capacitance and improving both performance and power efficiency.
Thus placing this new airgap technique is number ten on IBM's newly released 10 Chip Breakthroughs in 10 Years list.
The airgap
In a nutshell, IBM's "airgap" technique coats the copper wires inside a processor with an insulator that's superior to the glass that's typically used. That insulator is a vacuum, or "air" essentially. Reducing the dielectric constant of the insulation around each wire reduces the capacitance that arises when current flows through wires that are close to each other, capacitance that acts as a drag on the current flowing in the wires. This stray capacitance means that more power has to be pushed through the wires, and more power means more heat and/or slower clock speeds.
The amount of capacitance between two wires gets worse as they get closer together if the dielectric constant of the material between them isn't decreased to compensate. So as feature sizes shrink, these growing capacitances have been eating up some of the power and clockspeed gains that could potentially be derived from the finer process geometries. A number of researchers have been working on using a vacuum as a wire insulator in order to rein in capacitances as feature sizes shrink, but IBM is the first to announce that such a technology will be ready for mass production at the 32nm node.
IBM claims that their tests show that either a 15 percent power reduction or a 35 percent boost in the speed of the current in the wires is achievable with the new technique. This is definitely going to help IBM and its process technology licensees like AMD at 32nm, but as with all things in the realm of processor technology, real-world performance depends on a whole lot more than how fast the current goes through the wires. Another way of putting this would be to say that the performance increase that one generation of processors affords over the previous generation is the sum of many small tweaks, tricks, and techniques at all levels—process, microarchitecture, and ISA in some cases—each of which adds a few percent here and a few percent there to the grand total. The airgap is one of these tricks that's going to add a few points the 32nm products that use it.
One of the most important features of the new airgap technique is that it's easily integrated with standard CMOS fabrication techniques. This means that IBM won't have to overhaul its entire process to make the new technique work.
As for how the technique works, it appears that IBM replaces the masking and light etching stages of the fabrication process with a nanoscale self-assembly stage. This stage involves embedding the chip's copper wiring in a carbon silicate (glass) insulator material, and then coating it with a new polymer material. The polymer is then baked so that a mesh of very tiny, regularly spaced holes is formed in it. After the holes are formed, the glass is removed to leave a gap on either side of the wire.
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